This invention relates to circuitry for translating linear logic signals to TTL-compatible logic signals.
The requirement for programmable flexibility in many modern logic systems has given rise to logic circuitry which mixes high-speed linear logic, such as ECL, with digital circuitry, such as TTL, to provide the ability to custom-design logic systems. Increasingly, the combination of linear and digital circuitry has taken place on single very large scale integrated (VLSI) circuit devices. This permits one to produce standard programmable logic arrays which can be configured to the particular requirements of an individual user. An example of a logic array which combines linear and digital circuitry on a single VLSI device is the Q1500 array available from Applied Micro Circuits Corporation, San Diego, Calf., the assignee of the below-described invention.
Typically, such mixed-circuit devices include a central core area containing programmable linear logic circuitry, which is surrounded by one or more I/O sections. The translation circuitry necessary to adjust the characteristics of linear logic signal levels to standard digital logic levels is typically distributed between the logic core and the peripheral I/O sections. In the past, distribution of translation circuitry has led to the need to provide one or more positive voltage buses to the interior core area where the translation circuitry shifts the voltage level of the linear logic signals to a voltage level that is compatible with digital circuit operation. Since linear logic circuitry conventionally operates between a negative emitter voltage and ground, construction of a collector voltage bus to the interior logic core represents an added step in the device fabrication sequence. Moreover, the logic core is normally separated from the peripheral I/O section by an area across which a great many signal paths must be provided. Construction of one or more extra voltage buses in this area reduces the total area available for signal routing and complicates signal path layout.
Another problem characteristic of integrated circuit devices which mix logic families is associated with the fact that most of these circuits are constructed from bipolar circuit elements. Typically, the first step of translation involves shifting the linear voltage signals to a voltage level more compatible with digital signals. This frequently involves the provision of a collector voltage to a differentially-coupled, current-mode transistor pair. Under certain circumstances, when one of the transistor pair is turned off, the combination of the collector voltage and the emitter voltage required to operate the differential pair raises the collector-to-emitter voltage of the "off" transistor to a level exceeding the breakdown for the manufacturing process used.